Traducción y análisis de palabras por inteligencia artificial ChatGPT
En esta página puede obtener un análisis detallado de una palabra o frase, producido utilizando la mejor tecnología de inteligencia artificial hasta la fecha:
- cómo se usa la palabra
- frecuencia de uso
- se utiliza con más frecuencia en el habla oral o escrita
- opciones de traducción
- ejemplos de uso (varias frases con traducción)
- etimología
Qué (quién) es JMP (x86 instruction) - definición
![[[Am386]], released by AMD in 1991](https://commons.wikimedia.org/wiki/Special:FilePath/Am386SXL-25cropped.jpg?width=200 "[[Am386]], released by AMD in 1991")
![Alpha]], and others), and 32-bit x86 (green on the diagram), even though Intel initially tried unsuccessfully to replace x86 with a new incompatible 64-bit architecture in the [[Itanium]] processor. The main non-x86 architecture which is still used, as of 2014, in supercomputing clusters is the [[Power ISA]] used by [[IBM Power microprocessors]] (blue with diamond tiling in the diagram), with SPARC as a distant second.](https://commons.wikimedia.org/wiki/Special:FilePath/Processor families in TOP500 supercomputers.svg?width=200 "Alpha]], and others), and 32-bit x86 (green on the diagram), even though Intel initially tried unsuccessfully to replace x86 with a new incompatible 64-bit architecture in the [[Itanium]] processor. The main non-x86 architecture which is still used, as of 2014, in supercomputing clusters is the [[Power ISA]] used by [[IBM Power microprocessors]] (blue with diamond tiling in the diagram), with SPARC as a distant second.")
Wikipedia
In the x86 assembly language, the JMP instruction performs an unconditional jump. Such an instruction transfers the flow of execution by changing the program counter. There are a number of different opcodes that perform a jump; depending on whether the processor is in real mode or protected mode, and an override instruction is used, the instructions may take 16-bit, 32-bit, or segment:offset pointers.
There are many different forms of jumps: relative, conditional, absolute and register-indirect jumps.
The following examples illustrate:
- a relative jump with a 16-bit pointer;
- a long jump (inter-segment), a relative jump with a 32-bit pointer;
- and a register-indirect absolute jump using the EAX register.
(Note that although the first and second jumps are relative, commonly the destination address is shown instead of the relative offset as encoded in the opcode.)
Example one: Load IP with the new value 0x89AB, then load CS with 0xACDC and IP with 0x5578.
Example two: Load EIP with the value 0x56789AB1, only in protected mode or unreal mode.
Example three: Jump to the value stored in the EAX register, only in protected mode.
